| 摘要 |
A cache memory system for controlling a cache memory. The cache memory system is connected to a central processing unit and a main memory and the cache memory system is controlled to operate in a copyback operation mode. The cache memory system includes the cache memory which operates as cache memory to the central processing unit and a control circuit, responsive to detection of an error in the cache memory, for suspending an updating operation of an entry in the cache memory in which the error was detected, controlling access to valid entries in the cache memory, and causing the cache memory to operate as cache memory only when access from the central processing unit hits the valid entries of the cache memory. |
