发明名称 MEMORY STRUCTURE CAPABLE OF LOCATING FAILURE OF WAFER USING DUMMY PATTERN AND METHOD OF MANUFACTURING THE MEMORY STRUCTURE
摘要 PURPOSE: A memory structure capable of locating a failure of wafer using a dummy pattern and a method of manufacturing the memory structure are provided to reduce the manufacturing time by locating the failure quickly. CONSTITUTION: The memory structure includes a cell region and a peripheral region, a decoder region and a dummy pattern(31,32). The cell region includes a plurality of memory cells, a decoder and a sense amplifier. The peripheral region is provided in the area except for the cell region. The decoder region has a low pattern density. The dummy pattern locates the internal position of the memory device in the peripheral region. The dummy pattern has the size between 1 micrometer through 100 micrometer. The dummy pattern further denotes the internal position of the memory device by using alphabets, numerals or variable shape letters.
申请公布号 KR20010071101(A) 申请公布日期 2001.07.28
申请号 KR19990064328 申请日期 1999.12.29
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, SEONG GWON
分类号 G11C29/00;(IPC1-7):G11C29/00 主分类号 G11C29/00
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