| 摘要 |
PROBLEM TO BE SOLVED: To provide a device and a method for transferring data, with which the number of wiring between a register block and a data transfer part can be reduced and operation with a high speed clock is enabled. SOLUTION: According to the count value of a counter 22, one of register blocks A13, B33 and C53 is selected and further one of plural registers is selected out of the selected register block. Thus, the number of data buses between the register blocks A13, B33 and C53 and a data transfer part 24 can become one and the number of wiring between the register blocks A13, B33 and C53 and the data transfer part 24 can be reduced. Further, since the register blocks A13, B33 and C53 are provided with buffers 15, 35 and 55, the gate delay of multiplexers 12, 32 and 52 in the register blocks A13, B33 and C53 can be avoided and high speed clock operation is enabled.
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