| 摘要 |
PROBLEM TO BE SOLVED: To enable the operation of a bus in a high speed frequency. SOLUTION: An issue side LSI has a counter, to which a value showing how many commands can be simultaneously processed by a receiving side LSI or how many pieces of data can be simultaneously received is loaded at the time of initialization and when issuing a command or data, the counter is decremented. When a ready signal is received, the counter is incremented and when the counter is turned to '0', the issue of the command or data is suppressed. Therefore, the issue side LSI can issue the command or data to the receiving side LSI without confirming a busy signal from the receiving side LSI. Since the command or data issue side LSI can manage the state of the command buffer or data buffer of the receiving side LSI, even when the bus is operated at high speed, the command or data can be efficiently issued.
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