| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a step-up circuit which can cancel a back bias effect and can prevent the increase in a circuit area and consumed power, complication of a clock generation circuit, the decline in a current-carrying capacity, and an unstable step-up operation. SOLUTION: NMOS transistors NTs for carrying electric charges and nMOS transistors NTAs and NTBs for transmitting voltage are formed in a p well formed in an n well which is formed in a p type semiconductor substrate and biased at a specified voltage, to build up a step-up stage. The back bias effect can be prevented by connecting the sources of the nMOS transistors NTs for carrying electric charges to the p well when they are supplied with power and the unstable step-up operation caused by a punch-through phenomenon can be prevented by connecting the drains of the nMOS transistors NTs for carrying electric charges to the p well when they are not supplied with power.</p> |
