发明名称 MEMORY CONTROL DEVICE AND MEMORY CONTROL METHOD
摘要 <p>A memory control device and a memory control method having a plurality of store buffers and performing store and fetch to/from the store buffers; the memory control device and the memory control method being capable of reading stored data efficiently, wherein a specified store buffer is selected from a plurality of store buffers according to an identifier assigned to a data issuing request to identify an issuing sequence according to an instruction, and a specified data is output from the specified store buffer according to an address.</p>
申请公布号 WO2001053951(P1) 申请公布日期 2001.07.26
申请号 JP2000000234 申请日期 2000.01.19
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