发明名称 Method for forming a shallow trench isolation structure in a semiconductor device
摘要 In a method for forming a device isolation region of an STI structure in a semiconductor device, a surface protecting oxide film is formed on the surface of a trench by a thermal oxidation. Thereafter, a first silicon oxide film is deposited on the whole surface to fill up the trench and to cover the silicon nitride film on the principal surface of the silicon substrate, and then, by using the silicon nitride film as a stopper, a first CMP process is carried so that the first silicon oxide film remains in the trench. Thereafter, the silicon nitride film is removed, and a HTO film is formed on the pad oxide film covering the principal surface of the silicon substrate. Then, a second silicon oxide film is formed, and furthermore, a second CMP process is carried out to the extent that the principal surface of the silicon substrate is not exposed. Finally, a wet etching is carried so that the device isolation region of the STI structure is formed with no deterioration of the electric characteristics.
申请公布号 US2001009809(A1) 申请公布日期 2001.07.26
申请号 US20010766206 申请日期 2001.01.19
申请人 NEC CORPORATION 发明人 MIWA KIYOTAKA
分类号 H01L21/76;H01L21/304;H01L21/306;H01L21/762;(IPC1-7):H01L21/302 主分类号 H01L21/76
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