发明名称 PLL CIRCUIT
摘要 <p>A PLL circuit provided with a gain control function comprises a first phase comparator for producing a first phase difference signal indicative of the phase difference between a first input signal and a second input signal; a first loop filter for smoothing a signal associated with the first phase difference signal to produce a first control voltage; a first VCO oscillating at a frequency associated with the first control voltage to produce a first clock signal; and a dummy VCO having the same characteristic as the first VCO and oscillating at a frequency associated with a second control voltage to produce a second clock signal. There are also provided a VCO gain detector for detecting the VCO gain based on the difference between the first and second clock signal frequencies and the difference between the first and second control voltages, and a gain control circuit for controlling the loop gain to be constant based on the VCO gain detected by the VCO gain detector. The second input signal is depending on the first clock signal.</p>
申请公布号 WO2001054283(P1) 申请公布日期 2001.07.26
申请号 JP2000000170 申请日期 2000.01.17
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