| 摘要 |
PURPOSE: To provide a high speed address sequencer which can generate an address signal by using a clock having higher frequency. CONSTITUTION: A high speed address sequencer can generate all address signals for s short time by reducing the number of gate delay. More time is permitted for the high speed address sequencer in order to generate all address signal by the prescribed clock frequency by using one address signal as a clock for generating several other address signals. Reduction of the number of gate delay is compatible with use of the address signal as a clock.
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