发明名称 |
NON-VOLATILE SEMICONDUCTOR MEMORY |
摘要 |
PURPOSE: To avoid making algorithm complex in normal write-in operation and write-in operation before erasion. CONSTITUTION: This device is constituted so that a test bit is generated using a test bit generation matrix in which the number of elements of '1' of each row are the number of pieces required for generating a test bit and an odd number, in normal write-in operation and write-in operation before erasion.
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申请公布号 |
KR20010070291(A) |
申请公布日期 |
2001.07.25 |
申请号 |
KR20000074918 |
申请日期 |
2000.12.09 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
KASAI DAKAMICHI;KASAI NOZOMI |
分类号 |
G11C16/06;G11C16/16;G11C29/00;G11C29/42;(IPC1-7):G11C16/16 |
主分类号 |
G11C16/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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