发明名称 SEMICONDUCTOR MEMORY HAVING REDUNDANT CIRCUIT FOR REPLACING DEFECTIVE CELLS
摘要 PURPOSE: Disclosed is a semiconductor memory in which data for relieving a defective cell can be obtained without performing facility investment for a memory tester. CONSTITUTION: In a semiconductor memory provided with a redundant circuit replacing the defective cell existing on a memory cell array by a redundant cell and relieving the defect, data(DQ0-DQ15) of plural bits externally given are written into a memory cell in a memory cell array(30) by a write circuit(40), and read out from the memory cell array(30) by a read circuit(50). At this time, data are compressed by a data compression circuit(54) making bits of the prescribed number simultaneously being made an object of replacement by the redundant circuit as a unit and are outputted to the memory tester(200).
申请公布号 KR20010070347(A) 申请公布日期 2001.07.25
申请号 KR20000081094 申请日期 2000.12.23
申请人 NEC CORPORATION 发明人 KOSHIKAWA YASUJI
分类号 G11C11/41;G11C11/401;G11C11/413;G11C16/06;G11C29/00;G11C29/34;G11C29/40;(IPC1-7):G11C29/00 主分类号 G11C11/41
代理机构 代理人
主权项
地址