| 摘要 |
PURPOSE: To provide a VCM semiconductor memory. CONSTITUTION: By reducing what is controlled by one line of Main Word in a WDRV basic CELL to only half of low-order 2-bit in Row address, an RA signal unified formerly at a boundary of the WDRV basic CELL is places at (the center) the inside of the basic CELL. By wiring two lines of the Main Word so as to cross with each other, the other half of low-order 2-bit in the Row address is controlled by an adjoining basic CELL, and different two Main Words having the same low-order bit are contained in one WDRV basic CELL. As shown in Fig. 2 and 8, the distance between a reference point and an origin of RED as the left side of a CELL boundary of a WDRV for RED is made the origin of RED is, as this design is compared with the conventional design, made shorter by a+b when Tr interval is 2b and protruding width from the CELL boundary is (a).
|
