| 摘要 |
PURPOSE: To provide a semiconductor memory, having a function with which read-out speed can be increased by equalizing input impedance of a main cell side seen from IV conversion circuits 2, 3 with input impedance of a reference cell side, in a semiconductor memory having plural cell arrays and one reference cell array. CONSTITUTION: In order to equalize the impedance of a global bit line 4 connecting an IV conversion circuit M2 and each cell array with impedance of a dummy global bit line 6 connecting an IV conversion circuit R3 and a reference cell array, the device is provided with a constitution where an equalized wiring path can be formed at a reference side in a path, wiring length, and wiring with formed at a main side.
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