发明名称 METHOD AND APPARATUS FOR FORMING WIRING PATTERN OF SEMICONDUCTOR INTEGRATED CIRCUIT, RECORDING MEDIUM AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE: A method for designing a wiring pattern of a semiconductor integrated circuit device is provided to be capable of efficiently connecting different potential wirings adjacent at leading ends without using a wiring region as much as possible at a periphery of its connection. CONSTITUTION: At a step(12), superposed parts of opposed leading ends of wirings of different potentials from a wiring pattern(21) are detected, and at a step(13), avoiding patterns cut at the superposed parts of the wiring are generated. At a step(14), whether the patterns satisfy wiring conditions or not is verified. At a step(15), the wiring pattern based on the patterns for satisfying the conditions is formed based on the verified result.
申请公布号 KR20010070243(A) 申请公布日期 2001.07.25
申请号 KR20000071131 申请日期 2000.11.28
申请人 FUJITSU LIMITED 发明人 ITO MITSUO;YAMADA MAKOTO
分类号 G06F17/50;G11C5/02;H01L21/3205;H01L21/768;H01L21/82;H01L23/52;H01L23/528;(IPC1-7):G11C5/02 主分类号 G06F17/50
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