| 摘要 |
A non-destructive method for evaluating a topographical feature 16 of an integrated circuit 42, such as a photoresist runner, includes core sectioning the feature to remove a small section 22, without damage to the remainder of the wafer 36 on which the integrated circuit is formed. A tool having fine adjustment, such as a micromanipulator with a rod-shaped probe 24 in the form of a glass needle, is used to remove the section for examination and metrology. The section is separated from the underlying substrate surface 14 and can be examined from all sides. Variations in a critical dimension, such as line width W, along the length L of the section, as well as average measurements of the dimension, can be obtained.
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