发明名称 CLOCK STRETCHING CIRCUIT
摘要 PURPOSE: A clock stretching circuit is provided which stretches a main clock signal to generate a stabilized inner clock signal. CONSTITUTION: A clock stretching circuit includes a logic circuit(10), the first latch(20), the second latch(30), and a masking logic circuit(40). The logic circuit detects if the first stretching signal or the second stretching signal is activated for the first or second period and generates a detection signal. The first latch latches the detection signal at the first shift time of the main clock signal. The second latch latches the activated detection signal at the second shift time of the main clock signal when the detection signal output from the first latch maintains an activation level for a predetermined period of time. The masking logic circuit outputs the main clock signal as an inner clock signal while maintaining the inner clock signal at the first level while the detection signal output from the first latch has the activated level.
申请公布号 KR20010068391(A) 申请公布日期 2001.07.23
申请号 KR20000000305 申请日期 2000.01.05
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK, MIN CHEOL
分类号 H03K5/1252;(IPC1-7):H03K5/125 主分类号 H03K5/1252
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