发明名称 |
ANALOG/DIGITAL CONVERSION PROCESSING UNIT |
摘要 |
PROBLEM TO BE SOLVED: To provide an analog/digital conversion processing unit that can easily increase number of phases for a polyphase conversion clock and obtain a highly accurate delay. SOLUTION: Data conversion circuits 106 each configured with a clock control circuit 107 consisting of an input amplifier 109 receiving a pulse from a pulse shaping circuit that shapes amplitude and a pulse width of a clock with a prescribed period, of a delay circuit 110 that delays the pulse from the input amplifier 109 to generate a clock for analog/digital conversion, and of an output amplifier 111 that outputs the delayed pulse from the delay circuit 110 and with an analog/digital converter circuit 108 that applies analog/digital conversion to a converted signal supplied through a distribution circuit with a clock for analog/digital conversion supplied from the delay circuit are connected in al way that the clock control circuits 106 are connected in series.
|
申请公布号 |
JP2001196928(A) |
申请公布日期 |
2001.07.19 |
申请号 |
JP20000010009 |
申请日期 |
2000.01.13 |
申请人 |
HITACHI LTD;HITACHI ELECTRONICS ENG CO LTD |
发明人 |
ORIHASHI RITSURO;NAKAJO TOKUO;MAKUUCHI MASAMI;TAKAHASHI MASAYOSHI;HONMA SHINJI |
分类号 |
H03M1/12;(IPC1-7):H03M1/12 |
主分类号 |
H03M1/12 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|