发明名称 SOFT MUTE CIRCUIT
摘要 <p>A soft mute circuit includes a programmable amplifier (41) controlled by a register (42). Data is stored in the register from an adder (43) that combines the current data in the register with a second number for increasing or decreasing the gain of the amplifier. A summation circuit includes a plurality of inputs coupled by gates to a summation node and the summation node is coupled to an input of the programmable amplifier. The gates are controlled by suitable logic for selecting input signals in any combination. A control loop maintains the gain of the amplifier at a predetermined level.</p>
申请公布号 WO2001052409(A1) 申请公布日期 2001.07.19
申请号 US2000033932 申请日期 2000.12.15
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