发明名称 CALL GATE EXPANSION FOR 64 BIT ADDRESSING
摘要 <p>A processor supports a first processing mode in which the address size is greater than 32 bits. The address size may be nominally indicated as 64 bits, although various embodiments of the processor may implement any address size which exceeds 32 bits, up to and including 64 bits, in the first processing mode. The first processing mode may be established by placing an enable indication in a control register into an enabled state and by setting a first operating mode indication and a second operating mode indication in a segment descriptor to predefined states. Other combinations of the first operating mode indication and the second operating mode indication may be used to provide compatibility modes for 32 bit and 16 bit processing compatible with the x86 processor architecture (with the enable indication remaining in the enabled state). To call code operating in the first processing mode from the 32 bit or 16 bit code, a call gate descriptor is defined which occupies two entries in a segment descriptor table. By occupying two entries, each of which may otherwise store a segment descriptor, the call gate descriptor may include enough space to store an address in excess of 32 bits. Thus, a calling code segment may reference a call gate descriptor, which may reference the target code semgent and may provide an address within the address space of the target code segment, even if the address exceeds the address size in the calling code segment.</p>
申请公布号 WO2001052059(A1) 申请公布日期 2001.07.19
申请号 US2000019770 申请日期 2000.07.19
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