| 摘要 |
PROBLEM TO BE SOLVED: To realize a semiconductor integrated circuit which can improve detection rate for defects. SOLUTION: A PMOS 111 of high threshold voltage is provided between a VDD line 101 and a VDDV line 103, and an NMOS 121 of high threshold voltage is provided between a VSS line 102 and a VSSV line 104. A logic gate circuit 105, which receives supply of each power-supply voltage from the VDDV line 103 and the VSSV line 104 comprises PMOSs 131 to 133 and NMOSs 141 to 143 with a low threshold voltage. A voltage output from a voltage generation circuit 201 which generates a desired voltage in accordance with the test signal input from a pad 205 is applied to a sub-straight terminal of the PMOSs 131 to 133.
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