发明名称 MULTILAYER WIRING BOARD, WIRING BOARD, METHOD OF FORMING MULTILAYER WIRING BOARD AND WIRING BOARD AND SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a multilayer wiring board where stress generated due to a difference in the thermal expansion coefficient of a semiconductor element to be mounted can be relaxed not on a semiconductor element-side but on a substrate-side, and to provide a wiring substrate, the manufacturing methods of the multilayer wiring board and the wiring board and a semiconductor device. SOLUTION: The wiring layer 203a of the uppermost layer where a plurality of thermal pads 203b are formed in accordance with the positions of a plurality of solder bumps 207 (outer connection terminals) provided for the semiconductor element 205 to be mounted, a metallic column 208 formed on the terminal pad 203b, a resin coat 206 formed by covering the side part of the metallic column and an insulating layer 210 formed on the wiring layer 203a of the uppermost layer so that a gap is generate with the outer peripheral face of the resin coat 206 are installed.
申请公布号 JP2001196496(A) 申请公布日期 2001.07.19
申请号 JP20000004873 申请日期 2000.01.13
申请人 SHINKO ELECTRIC IND CO LTD 发明人 IIJIMA TAKAHIRO;WAKABAYASHI SHINICHI;MATSUDA YUICHI
分类号 H01L21/60;H01L21/768;H01L23/12;H01L23/498;H05K1/02;H05K1/11;H05K1/18;H05K3/34;H05K3/46 主分类号 H01L21/60
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