发明名称 METHOD AND APPARATUS FOR DECODING MPEG VIDEO SIGNALS
摘要 A method and apparatus for decoding an input MPEG (Fig. 1) video stream are provided that includes a core processor with a very long instruction word (VLIW) processor (Fig. 2A, 21) and a co-processor that includes a variable length decoder (VLD) for decoding the MPEG video stream (Fig. 2A, 24). The input MPEG video stream is organized into macroblocks, wherein each macroblock includes a header for a macroblock that is not decoded, and encoded data for a macroblock whose header is previously decoded by VLD (Fig. 5). Thereafter, VLD decodes the encoded video data of a first macroblock whose header has been decoded, and decodes the header of a second (current) macroblock (Fig. 6). VLIW then performs motion compensation on a current macroblock based upon reference data of a previously decoded macroblock (Fig. 7). VLIW also adds a fake slice start code and fake macroblock data at the end of each picture into the input MPEG video data stream (Fig. 3, S305); and utilizes the fake slice start code and fake macroblock data to skip to a next slice (Fig. 3, S306). The fake macroblock data indicates an error to the VLD stopping the decoding process until the core processor clears the interrupt and reinitiates decoding of a selected macroblock (Fig. 3, 310).
申请公布号 WO0152539(A1) 申请公布日期 2001.07.19
申请号 WO2000US35287 申请日期 2000.12.27
申请人 SONY ELECTRONICS INC. 发明人 LUNA, AMELIA, CARINO;WANG, JASON, N.;WILLIAMS, RICHARD, L.
分类号 G06T9/00;H04N7/26;H04N7/50;(IPC1-7):H04N7/12 主分类号 G06T9/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利