MIS transistor and manufacturing method thereof

摘要

This invention provides a MIS transistor with less electrical short between a gate and source/drain electrodes. A sidewall spacer 15 has a two-layer structure including a buffer layer 13 which consists of nitrided oxide silicon and a silicon nitrided layer 14 formed on the buffer layer 13. The sidewall spacer 15 serves as a mask to form a silicide film 10.