| 摘要 |
The method for forming a flash memory cell mainly includes the steps as follows. At first, a semiconductor substrate having isolation regions thereon and having a well region provided between the isolation regions is provided. A tunnel oxide layer is formed on the well region and a first silicon layer is formed over the substrate. A dielectric layer is formed on the first silicon layer and a portion of the first silicon layer and the dielectric layer is removed to define a control gate opening within the first silicon layer on a portion of the well region. Next, the substrate is doped in the region under the control gate opening to adjust a threshold voltage of the flash memory cell. A gate oxide layer is grown from the substrate in the control gate opening and a second silicon layer is formed on the substrate to fill within the control gate opening and to cover the remaining dielectric layer. The second silicon layer, the dielectric layer, and the first silicon layer are then patterned to form a gate structure of the flash memory cell, and to leave a drain opening exposing a portion of the tunnel oxide on the well region. Finally, the substrate is doped to form a drain region in the substrate between the gate structure and one of the isolation regions.
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