发明名称 |
Double gate-oxide for reducing gate-drain capacitance in trenched DMOS with high-dopant concentration buried-region under trenched gate |
摘要 |
This invention discloses a DMOS power device supported on a substrate. The DOS power device includes a drain of a first conductivity type disposed at a bottom surface of the substrate. The DMOS power device further includes a gate disposed in a trench opened from a top surface of the substrate, the gate having a polysilicon layer filling the trenches padded by a double gate-oxide structure. The double gate-oxide structure includes a thick-oxide-layer covering walls of the trench below an upper portion of the trench and a thin-gate-oxide covering walls of the upper portion of the trench thus defining a champagne-glass shaped gate in the trench. The DMOS power device further includes a source region of the first conductivity type disposed in the substrate surrounding a top portion of the trench. The DMOS power device further includes a body region of a second conductivity type disposed in the substrate surrounding the trench and encompassing the source region.
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申请公布号 |
US6262453(B1) |
申请公布日期 |
2001.07.17 |
申请号 |
US19980066033 |
申请日期 |
1998.04.24 |
申请人 |
MAGEPOWER SEMICONDUCTOR CORP. |
发明人 |
HSHIEH FWU-IUAN |
分类号 |
H01L21/336;H01L29/08;H01L29/10;H01L29/423;H01L29/78;(IPC1-7):H01L29/76 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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