| 摘要 |
By using the InGaAs layer in which the In composition is graded or varied by stages for the contact resistance reducing cap layer of the recess type compound semiconductor FET as well as using the selective etching to InAs and GaAs at the time of recess etching, the recess profile can be made curvilinear without increasing the number of processes, and occurrence of the concentration of the electric field can be thereby prevented, restriction of the high breakdown voltage value due to recess profile eliminated, and high breakdown voltage achieved.
|
