| 摘要 |
1,212,902. Pulse modulation circuits; transistor gate and hold circuits. STANDARD TELEPHONES & GABLES Lfd. 10 April, 1968, No. 17377/68. Headings H3T and H4L. In a circuit for demodulating amplitude modulated pulses in a time division multiplex system, the incoming signals are supplied via a transistor VT 1 , gated at the time positions in the multiplex cycle of the channels in use, by pulses applied to its base, to the emitter of a normally cut off transistor VT 3 of one of the demodulating circuits. During the initial portion of a gating pulse, collector current for VT 1 flows via a diode D 1 but shortly after the start, and terminating before the end of these gating pulses, pulses at the corresponding channel time position are applied to the base of a normally cut off transistor VT 2 . This causes VT 2 to conduct and its collector potential to rise to almost + 12 volts so that current flows in R 1 and the base of VT 3 is clamped at approximately + 5À7 volts due to diode D 2 conducting. The emitter of VT 3 will be at about +5 volts so that diode D 1 will be blocked and the current through VT 1 will be diverted to VT 3 , the potential across R 2 being proportional to the amplitude of the input signal and causing capacitor C 1 to be charged accordingly. At the end of the pulse applied to VT 2 , VT 2 and VT 3 are cut off and diode D 1 becomes conductive, D 3 being reverse-biased so that capacitor C 1 retains its charge. C 1 is coupled to an audio-amplifier consisting of a Darlington pair VT 4 , VT 5 filtering being added as required. The transistor connected to the base of VT 1 provides an indication to control circuitry (not shown) as to which time slots are busy and also clamps the base potential of VT 1 . |
