METHOD AND APPARATUS FOR GIGABIT PACKET ASSIGNMENT FOR MULTITHREADED PACKET PROCESSING
摘要
A network processor that has multiple processing elements, each supporting multiple simultaneous program threads with access to shared resources in an interface. Packet data is received from high-speed ports in segments and each segment is assigned to one of the program threads. Each packet may be assigned to a single program thread, two program threads - one for header segment processing and the other for handling payload segment(s) - or a different program thread for segment of data in a packet. Dedicated inputs for ready status and sequence numbers provide assistance needed for receiving the packet data over a high speed port. The dedicated inputs are used to monitor ready flags from the high speed ports on a cycle-by-cycle basis. The sequence numbers are used by the assigned threads to maintain ordering of segments within a packet, as well as to order the writes of the complete packets to transmit queues.
申请公布号
WO0150679(A2)
申请公布日期
2001.07.12
申请号
WO2000US33405
申请日期
2000.12.07
申请人
INTEL CORPORATION;WOLRICH, GILBERT;BERNSTEIN, DEBRA;ADILETTA, MATTHEW, J.;HOOPER, DONALD, F.
发明人
WOLRICH, GILBERT;BERNSTEIN, DEBRA;ADILETTA, MATTHEW, J.;HOOPER, DONALD, F.