A memory system uses multiple pulse amplitude modulation (multi-PAM) output drivers and receivers to send and receive multi-PAM signals. A multi-PAM signal has more than two voltage levels, with each data interval now transmitting a "symbol" at one of the valid voltage levels. In one embodiment, a symbol represents two or more bits. The multi-PAM output driver drives an output symbol onto a signal line. The output symbol represents at least two bits that include a most significant bit (MSB) and a least significant bit (LSB). The multi-PAM receiver receives the output symbol from the signal line and determines the MSB and the LSB.
申请公布号
WO0150228(A2)
申请公布日期
2001.07.12
申请号
WO2001US00481
申请日期
2001.01.05
申请人
RAMBUS INC.
发明人
ZERBE, JARED, L.;GARLEPP, BRUNO, W.;CHAU, PAK, S.;DONNELLY, KEVIN, S.;HOROWITZ, MARK, A.;SIDIROPOULOS, STEFANOS;GARRETT, BILLY, W., JR.;WERNER, CARL, W.