发明名称 COMMUNICATION BUS FOR A MULTI-PROCESSOR SYSTEM
摘要 In accordance with the invention, a multi-processing unit system (10) including a plurality of processing units (14-38) in direct communication via a communication bus (12) is presented. The system includes a communication bus arbiter (40) having a communication packet multiplexer. Each of the processing units include a communication bus interface comprising a transmitter interface and a receiver interface. Each of the transmitter interfaces are connected to the communication packet multiplexer of the communication bus arbiter via separate 32-bit interfaces. Each of the receiver interfaces is connected to the communication packet multiplexer of the communication bus arbiter via a single 32-bit bus. The system may further comprise a first control signal connection means for communicating control signals between the transmitter interface and the communication bus arbiter and a second control signal connection means for communicating control signal between the receiver interface and the communication bus arbiter.
申请公布号 WO0150216(A2) 申请公布日期 2001.07.12
申请号 WO2001IB00276 申请日期 2001.01.03
申请人 VM LABS, INC. 发明人 MATHIESON, JOHN, G.
分类号 G06F13/364;(IPC1-7):G06F/ 主分类号 G06F13/364
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