发明名称 Data transfer circuit
摘要 A data transfer circuit includes data lines for transferring data, interface input/output blocks connected to the data lines for input or output of data through the data lines, and a leakage current monitor and compensate circuit connected to the data lines to detect and store magnitudes of leakage currents in the data lines before input or output of data, and generate and supply to the data lines compensation currents that compensate the leakage currents upon input or output of data. An example of the data line is a bit line of a memory, and an example of the interface input/output block is a memory cell.
申请公布号 US2001007537(A1) 申请公布日期 2001.07.12
申请号 US20010754131 申请日期 2001.01.05
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 AGAWA KENICHI;TAKAYANAGI TOSHINARI
分类号 G11C11/413;G06F3/00;G11C7/10;G11C7/12;G11C7/24;G11C11/417;(IPC1-7):G11C7/00 主分类号 G11C11/413
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