发明名称 OPTIMIZED DRIVER LAYOUT FOR INTEGRATED CIRCUITS WITH STAGGERED BOND PADS
摘要 An embodiment of an integrated circuit die with staggered bond pads and optimized driver layout includes a staggered array of bond pads with an outer ring of bond pads and an inner ring of bond pads. Driver/ESD circuit cells for the outer ring of bond pads are located to the outside of the bond pads (between the outer ring of bond pads and the nearest die edge). The driver/ESD cells for the inner ring of bond pads are located to the inside of the bond pads (between the inner ring of bond pads and the die core).
申请公布号 WO0150526(A1) 申请公布日期 2001.07.12
申请号 WO2000US42277 申请日期 2000.11.27
申请人 INTEL CORPORATION;JASSOWSKI, MICHAEL, A. 发明人 JASSOWSKI, MICHAEL, A.
分类号 H01L23/485;H01L27/02 主分类号 H01L23/485
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