发明名称 Direct memory access transfer apparatus
摘要 Two-dimensional addresses of lateral lines of a rectangular area are produced in a prescribed scanning order in a sender-memory control unit as readout addresses of a sender's memory, pieces of pixel data corresponding to the readout addresses are read out from the sender's memory, the pieces of pixel data read out are sub-sampled at a sample ratio of n:1 in a direction of each lateral line according to a quincunx method in a data transforming unit, two-dimensional write addresses of a receiver's memory are produced in a receiver-memory control unit, and pieces of sub-sampled pixel data are written in the receiver's memory. Accordingly, the pieces of pixel data can be sub-sampled and transferred at a high speed in a DMA transfer apparatus.
申请公布号 US2001007454(A1) 申请公布日期 2001.07.12
申请号 US20010757472 申请日期 2001.01.11
申请人 SUZUKI HIROKAZU;KAMEMARU TOSHIHISA;OHIRA HIDEO 发明人 SUZUKI HIROKAZU;KAMEMARU TOSHIHISA;OHIRA HIDEO
分类号 G06F13/28;G09G5/391;H04N7/32;(IPC1-7):G09G5/39;G06F12/02;G06F13/00 主分类号 G06F13/28
代理机构 代理人
主权项
地址