ROW DECODER CIRCUIT OF FLASH MEMORY

摘要

PURPOSE: A row decoder circuit of a flash memory is provided to reject current increasing due to temperature variation by strictly verifying with a voltage higher than zero volt, in order to increase low source voltage program efficiency at high temperature. CONSTITUTION: The row decoder circuit includes a switch, a negative gate bias generator(10), a post program verifying bias generator(20), a logic gate(30) and a switching device(N3). The switch drives the word line of the flash memory cell. The negative gate bias generator includes an output node connected with the switch in order to output a negative voltage to the switch when an erase signal is enabled. The post program verifying bias generator includes an output node connected with the switch in order to output a voltage higher than a predetermined level to the switch when a post-programming verifying signal is enabled. The logic gate outputs the switching signal according to the state of the erase signal and the post-programming verifying signal. The switching device is switched by the output signal of the logic gate and controls the voltage applied on the switch.