发明名称 PRE-DECODER CIRCUIT
摘要 PURPOSE: A pre-decoder circuit is provided to implement a column address bus and a row address bus as one bus by combining two buses in order to reduce the number of buses. CONSTITUTION: The pre-decoder circuit includes the first and second source voltage supplies(1,11), an output display(3), input device for an external column address strobe signal(4), input device for an external row address strobe signal(5), an input device for internal column address strobe signal(6), an input device for internal row address strobe signal(7), a pre-charger(2), input device for an external address(8), an input device internal column address(9), and an internal row address counter(10). The first and second source voltage supplies outputs the first and second source voltages. The output display decodes input address and display whether the address corresponding to the specified decoder is input. The input device for external column address strobe signal, the input device for external row address strobe signal, the input device internal column address strobe signal, and the input device internal row address strobe signal are all coupled with the output display in parallel and receives the first strobe signal, the second strobe signal, the third strobe signal and the forth strobe signal, respectively. The pre-charger receives the first through forth strobe signals, delivers the first source voltage to the output display and initializes the pre-decoder circuit for decoding next address. The external address input device is coupled between one terminal commonly coupled by the input device external column strobe signal and the input device external row address strobe signal and the supply terminal of the second source voltage source and receives a plurality of external address coupled for pre-decoding. The internal column address input device is coupled between one terminal of internal column address strobe signal input device and the supply terminal of the second source voltage source and receives a plurality of external address coupled for pre-decoding. The internal row address counter is coupled between the one terminal of the internal row address strobe signal input device and the supply terminal of the second source voltage and receives a plurality of addresses combined for pre-decoding.
申请公布号 KR20010065780(A) 申请公布日期 2001.07.11
申请号 KR19990065722 申请日期 1999.12.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JUNG, IN CHEOL;LEE, CHANG HYEOK
分类号 G11C11/402;(IPC1-7):G11C11/402 主分类号 G11C11/402
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