| 摘要 |
Described herein is a system and method of disabling D bits in a CT2 MUX signaling channel. When the bit count equals the bit location of where the D bits are typically located in the signaling channel of a CT2 MUX, circuitry of the present invention disables a D bit enable signal from being processed. The D bit enable signal would typically allow a transmitter and receiver to, respectively, send a bit as a D bit, or process a received bit as a D bit. The suffix of the CT2 MUX, consisting of D bits, is unaffected by the present invention.
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