Synchronous semiconductor memory device allowing easy and fast test

摘要

A synchronous semiconductor memory device performs input/output of data in synchronization with an externally applied external clock signal or a data strobe signal in a test operation mode. An operation of an internal circuit in the test operation mode is performed in synchronization with a dock signal produced by an internal control clock producing circuit and being faster than the external clock. In the test operation mode, a decode circuit produces write data based on data applied to a specific terminal among data I/O terminals, and a result of comparison of a plurality of read data is issued to the specific terminal during a data read operation.