发明名称 Circuit arrangement and method incorporating data buffer with priority-based data storage
摘要 A data processing system, circuit arrangement, integrated circuit device, program product, and method utilize a data buffer with a priority-based data storage capability to handle incoming data from a plurality of available data sources. With such a capability, different relative priority levels are assigned to data associated with different data sources. Such priority levels are then used by control logic coupled to the buffer to control whether or not incoming data is stored (or optionally discarded) in the buffer. In particular, the relative priority of incoming data is compared with that associated with data currently stored in the buffer, with the incoming data being stored in the buffer only when its relative priority exceeds that of the currently-stored data.
申请公布号 US6260090(B1) 申请公布日期 2001.07.10
申请号 US19990262158 申请日期 1999.03.03
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 FUHS RONALD EDWARD;HINZ KENNETH CLAUDE;HOOVER RUSSELL DEAN;SHEDIVY DAVID ALAN
分类号 G06F13/18;(IPC1-7):G06F13/00 主分类号 G06F13/18
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