发明名称 ELECTRIC RULE CHECK DEVICE AND METHOD FOR SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To easily perform ERC rule check from process rule data provided from a design process. SOLUTION: An input part 10 receives the process rule data generated by the design process of the layout of a semiconductor or the like. An ERC rule data generation part 20 automatically generates ERC rule data for deciding the ERC rule of the semiconductor device by an automatic conversion program based on the process rule data inputted from the input part 10. CAD devices 31, 32, -, 3n for layout verification perform the ERC check based on the ERC rule data inputted from the ERC rule data generation part 20 by respective programs for verification and output the check results. By such constitution, the electric rule check data are automatically generated from the process rule data and the electric rule check is performed.
申请公布号 JP2001188808(A) 申请公布日期 2001.07.10
申请号 JP19990372626 申请日期 1999.12.28
申请人 SONY CORP 发明人 WAKIYAMA ATSUSHI
分类号 H01L29/00;G06F17/50;H01L21/82;(IPC1-7):G06F17/50 主分类号 H01L29/00
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