发明名称 Logic circuit and signal transmission method
摘要 In the transmission of a logic signal, there is a reduced maximum value and a reduced average value of the number of bits varied by transforming an input level representation original logic signal having n bits into a transition representation logic signal of m groups with only a maximum of k bits varied, wherein k and m are integer numbers, n is greater than k and each value of k and m is greater than 1. The transformed logic signal of m groups is transmitted. The transmitted logic signal of m groups is then transformed into the original logic signal having n bits. A maximum number of bits varied is k, which can be below n/2 as a maximum, which is less than an average bit variation of the input original signal.
申请公布号 US6259383(B1) 申请公布日期 2001.07.10
申请号 US19990267596 申请日期 1999.03.15
申请人 HITACHI, LTD. 发明人 MIKI YOSHIO
分类号 H03M5/06;H03M5/00;H03M7/14;(IPC1-7):H03M5/00 主分类号 H03M5/06
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