发明名称 METHOD AND SYSTEM FOR VERIFYING DESIGN OF SYSTEM ON CHIP
摘要 PROBLEM TO BE SOLVED: To provide a method and a system for verifying the design of a system on chip accurately at high speed and at a low cost. SOLUTION: The method for verifying the design of a system on chip comprises a step for verifying each core integrated in a system on a system on chip, a step using a silicon a silicon IC corresponding to each core and a simulation test bench from a core provider, a step for verifying the interface between respective cores, the core, an on chip bus and a glue logic using an FPGA or emulation of a test bench and the glue logic, a step for verifying the timing between cores and the timing of system on chip level, and a step for verifying design of the entire system by using the simulation test benches of the entire system on chip and executing applications.
申请公布号 JP2001189387(A) 申请公布日期 2001.07.10
申请号 JP20000333518 申请日期 2000.10.27
申请人 ADVANTEST CORP 发明人 ROCHETTO RAJUMAN;YAMOTO HIROAKI
分类号 G01R31/28;G06F11/26;G06F17/50;H01L21/82;(IPC1-7):H01L21/82 主分类号 G01R31/28
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