| 摘要 |
PURPOSE: A method for manufacturing an interlayer dielectric of a semiconductor device is provided to improve an operating speed in a high integration process of 0.13 micrometer or less, by using fluidity of an intermediate of vaporized tetraethoxysilane(TEOS) and H2O2 and condensation resultant. CONSTITUTION: A wafer having an interconnection pattern(42) is mounted in a reaction furnace. Tetraethoxysilane(TEOS) and H2O2 of a liquid state are vaporized, and sprayed on the surface of the wafer mounted in the reaction furnace. The mixed TEOS and H2O2 reacts with the surface of the wafer to generate a reaction intermediate(44). An interlayer dielectric(43A,43) is formed on the entire structure of the wafer by the condensation resultant of the reaction intermediate.
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