| 摘要 |
PURPOSE: A method for manufacturing a metal interconnection of a semiconductor device is provided to reduce permittivity of an interlayer dielectric in which a via plug hole is formed, and to reduce via resistance of a copper interconnection. CONSTITUTION: A semiconductor substrate(10) having a lower interconnection(20) is prepared. An organic oxide layer(30) is formed on the lower interconnection. The first inorganic oxide layer(40) is formed on the organic oxide layer. The second inorganic oxide layer(50) is formed on the first inorganic oxide layer. A trench is formed on the second inorganic oxide layer to expose the first inorganic oxide layer. The first via plug hole is formed in the trench to expose the organic oxide layer. The second via plug hole is formed to expose the lower interconnection. A copper layer is formed to bury the second via plug hole. The copper layer is etched to form a copper interconnection(100).
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