发明名称 Duty cycle adapter
摘要 A method and apparatus (20) for adjusting a duty cycle of a binary signal (36) having a high phase and a low phase. The method includes applying a delay to the binary signal to create a delayed signal, and performing a Boolean logical operation on the binary signal and the delayed signal, so as to generate an output signal (40, 52) having a duty cycle different from the duty cycle of the binary signal.
申请公布号 AU2216501(A) 申请公布日期 2001.07.09
申请号 AU20010022165 申请日期 2000.12.28
申请人 MELLANOX TECHNOLOGIES LTD. 发明人 SHAI COHEN;RONNEN LOVINGER
分类号 G11C27/02;H03K5/00;H03K5/13;H03K5/156;H04L7/00;H04L7/04;H04L7/10 主分类号 G11C27/02
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