发明名称
摘要 <p>PURPOSE:To provide a margin till a logic level is changed by making a change gradient in the rise or the fall of a delay pulse signal steep. CONSTITUTION:This processing circuit is provided with a ramp waveform generator 1 changing the change gradient of a leading edge or a trailing edge of an inputted pulse signal and outputting the result as a ramp waveform signal and also with a pulse signal generating circuit 2 controlling a timing to generate a pulse signal by adjusting a threshold level where the ramp waveform signal outputted from the ramp waveform generator 1 is sliced and generating a delay pulse signal delaying slightly the input pulse signal and with a change gradient correction circuit 3 changing steeply the change gradient of the rise or the fall of the delay pulse signal.</p>
申请公布号 JP3185229(B2) 申请公布日期 2001.07.09
申请号 JP19910024189 申请日期 1991.01.24
申请人 发明人
分类号 H03K5/13;(IPC1-7):H03K5/13 主分类号 H03K5/13
代理机构 代理人
主权项
地址