METHOD FOR PLANARIZING SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for planarizing a semiconductor device is provided to prevent a metal layer pattern from being lifted up and functioning as a source, by making a uniform thickness of an interlayer dielectric left in an edge portion and a central portion of a wafer. CONSTITUTION: The first interlayer dielectric(21) is formed on a semiconductor substrate(20) having a predetermined lower structure. A stacked structure of the first diffusion blocking layer pattern, a metal layer pattern(23) and the second diffusion blocking layer pattern is formed on the first interlayer dielectric. A Si-rich SiON layer as an etch blocking layer(25) is formed on the entire surface. The second interlayer dielectric(26) is formed on the entire surface. Until the etch blocking layer is exposed, a chemical mechanical polishing(CMP) process for eliminating the second interlayer dielectric is performed to uniformly planarize an edge portion and a central portion of the wafer. Ceria-based slurry is used in the CMP process. The third interlayer dielectric(27) is formed on the entire surface.