发明名称 STACK CHIP PACKAGE
摘要 PURPOSE: A stack chip package is provided, which can be realized without regard to an arrangement of an electrode pad of an upper chip. CONSTITUTION: A bottom chip(60) has a plurality of electrode pads around an edge of an active surface. And the bottom chip is attached to an upper surface of a main substrate(80) where a substrate pad(82) is formed. A rearranged line substrate(85) is attached to the active surface between the electrode pads of the bottom chip and has a rearranged line on its upper surface. A top chip(70) is attached to the upper surface of the rearranged line substrate and has a plurality of electrode pads on its active surface. The first bonding wire(62) connects the electrode pad of the bottom chip with the substrate pad corresponding thereof, and the second bonding wire(94) connects the electrode pad of the top chip with the rearranged line substrate corresponding thereof. A package body is formed by being encapsulated with a molding compound to protect the bottom chip and the rearranged line substrate and the top chip and the bonding wires from the external. And a plurality of solder balls are formed on a bottom surface of the main substrate. One end of the rearranged line pattern is formed on the upper surface of the rearranged line substrate adjacent to the electrode pad of the top chip, and another end of the rearranged line pattern is formed on the upper surface of the rearranged line substrate located on a position corresponding to the substrate pad where the electrode pad of the bottom chip is bonded.
申请公布号 KR20010062929(A) 申请公布日期 2001.07.09
申请号 KR19990059683 申请日期 1999.12.21
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KANG, SEON WON
分类号 H01L23/12;(IPC1-7):H01L23/12 主分类号 H01L23/12
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