METHOD FOR MANUFACTURING WAFER LEVEL PACKAGE

摘要

PURPOSE: A method for manufacturing a wafer level package is provided to reduce a manufacturing cost by improving a metal pattern formation process. CONSTITUTION: A lower insulating layer(20) is formed on a surface of a wafer(10). Bond pads(11) of plural semiconductor chips formed on the wafer(10) are exposed by etching the lower insulating layer(20). A metal layer is formed on the lower insulating layer(20) and the exposed bond pads(11) by performing a non-electrolytic plating process. A metal pattern(31) is formed by patterning the metal layer. An upper insulating layer(21) is formed on the lower insulating layer(20). The metal pattern(31) is exposed partially by etching the upper insulating layer(21). An etching groove of the upper insulating layer(21) is buried with a metal bump post(32) by performing an electrolytic plating process. A solder ball(40) is formed on the metal bump post(32). The semiconductor chips are separated by cutting the wafer along a scribe line.