发明名称 EQUALIZER
摘要 PURPOSE: An equalizer is provided to support a hardware share up to the number of system clocks at maximum. CONSTITUTION: A storing part(211) stores an inputted symbol and a value of the inputted symbol, rotates it to allow the stored symbol values within one symbol clock to be calculated, updates an oldest symbol value if a select signal is activated and inputs a new symbol. A multiplexer(231) selects any one of the outputs of the storing part(211) and outputs the same. A coefficient updating part(231) receives the output of the multiplexer(231) and an external control signal and outputs a new coefficient responsive to the control signal. A delay part(241) delays the output of the coefficient updating part(231) by the number of taps of the equalizer and provides the same to the coefficient updating part(231). A multiplier(251) multiplies the output of the coefficient updating part(231) with the output of the storing part(211). An accumulator(261), when the selection signal is inactivated, accumulates the coefficient of the symbol values stored in the storing part(211) and the output of the multiplier(251), and when the selection signal is activated, outputs the accumulated values and simultaneously receives the output of the multiplier(251).
申请公布号 KR20010061588(A) 申请公布日期 2001.07.07
申请号 KR19990064084 申请日期 1999.12.28
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHOI, HAN JUN;LEE, DEOK MYEONG
分类号 H04N7/015;(IPC1-7):H04N7/015 主分类号 H04N7/015
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