发明名称 |
CHIP SCALE PACKAGE AND MANUFACTURING METHOD THEREOF |
摘要 |
PURPOSE: A method for manufacturing a chip scale package(CSP) is provided to control a crack in a solder ball, by making an elastic layer absorb stress generated by a difference of thermal expansion coefficient between a package mounting board and a semiconductor chip. CONSTITUTION: An interconnection board is prepared. An elastic layer(27) of the interconnection board is adhered to a semiconductor chip(10). The adhered interconnection board and semiconductor chip are transfer-molded to encapsulate all of the semiconductor chip with an encapsulating material(50). A via hole of the interconnection board is filled with a conductive solder(60) while a solder ball(70) is placed on a ball land of a metal pattern(21) of the interconnection board. A reflow process is performed to heat the resultant structure by using infrared rays so that the conductive solder is connected to a bonding pad(11) of the semiconductor chip while the solder ball is connected to the ball land of the metal pattern.
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申请公布号 |
KR20010061784(A) |
申请公布日期 |
2001.07.07 |
申请号 |
KR19990064325 |
申请日期 |
1999.12.29 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
BAEK, HYEONG GIL;LEE, NAM SU |
分类号 |
H01L23/04;(IPC1-7):H01L23/04 |
主分类号 |
H01L23/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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